ELECTRONICS DESIGN COURSE

Fundamentals of CPLD/FPGA System Design with Verilog/VHDL Language

 

Description:

This course is targeted for those who begin to learn complex programmable logic device (CPLD) or Field Programmable Gate Array (FPGA). The course is based on Verilog language. Students will learn how to use Verilog library, how to build entities and architectures and how to debug after completing a program. This course combines both theoretical lecture and hand-on practices on study board (based on Altera MAXII EPM240T100C5 chip).

Pre-requisition: Digital electronics
Duration: 30 hours / Part time
Commencing/End date: Schedule
Mode of Delivery: Instructor led, classroom based training
Method of assessment:  Exercise and project
Location: St.Hua Classroom
Average Teacher to Student Ratio: 1:10
Industrial Attachment: NA
Instructor: Mr. Tang Fan / Mr. Adam Ye

Content:

  
  • Concept of CPLD and FPGA.
  • Verilog HDL guide.
  • Use Quartus II software developing platform
  • Timing Analyzer
  • Simulation
  • Introduction to ModelSim
  • Peripheral circuit design analysis
  • Experiment and design project
 
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